//2-1 MUX
//Last modified by yangjao at 2021/5/10

module MUX_2_1(
    input wire S,
    input wire[31:0] data_in1,
    input wire[31:0] data_in2,

    output reg[31:0] data_out
);

always@(*)begin
    if(!S)begin
        data_out = data_in1;
    end else if(S==1'b1)begin
        data_out = data_in2;
    end else begin
        data_out = data_in1;
    end
end

endmodule